Questions

For these questions, extract and label the values for the following metrics on your m5out/stats.txt, copying each line from stats.txt entirely (hints: note that searching with regex might be helpful when looking through stats.txt, and if you get stuck make sure to look up the acronyms you find in the gem5 documentation):
1. (2 points) The total number of instructions committed. This total includes all the instructions that have completed all the phases of instruction execution, including writing their results to the register file.
  1. Why is this number not equal to the number of instructions executed as reported by the stats?
  2. Is the number of instructions executed the same as the one set-up in options.maxinsts (10^8)?
2. (2 points) The total number of committed branches and their frequency with respect to the number of committed instructions. Does this seem to be consistent with what the common knowledge about branch occurrences in integer programs is?
note
In computer architecture programs that mostly operate on integer types (of any size) are called "integer programs" to differentiate them from scientific applications that operate mostly on floating-point types, and thus are referred to as "FP programs".

tip
There are hints about common knowledge to be found in various places in the textbook, and research online can be valuable too.
1. (2 points) The total number of block replacements for the L1 data cache.
2. (3 points) The number of accesses to the L2 cache. If gem5 had not printed it out, how would you deduce it from other metrics generated by the simulator?
Answer the following questions:
1. (2 points) In general we say "L1 I-cache miss ratios are negligible while L1 D-cache miss ratios are not". Is this true for your experiment?
  1. If you observed a non-negligible I-cache miss rate, what factors could have contributed to it?
  note
  The answer might vary depending on the benchmark or application run on the simulator.
2. (3 points) Accesses to the memory hierarchy are a major contributor to the increase of the CPI. You should attempt to quantify the contribution of cache misses to the CPI.
  tip
  For that, decompose it into the contribution of misses in each of the 4 caches (L1-I, L1-D, and L2). Be careful that the hit ratios are related to accesses to the various caches and convert that into figures related to frequency of instructions. The latencies in stats.txt sometimes are printed in ticks, which are equivalent to the amount of picoseconds in the simulation. Therefore, for a 2GHz machine, for instance, 1 cycle == 500 ticks. Indeed, sometimes gem5 prints ticks and refers to them as cycles, so make sure to check carefully.
3. (3 points) List three other possible contributions to the increase of the CPI.
(1 point) The best time to be critical and to offer constructive suggestions about an assignment is soon after completing it. Please include the following in the report:
1. A narrative description of any difficulties or misunderstandings that made the assignment unnecessarily difficult, or that led to wasted time.
2. Suggestions of changes that could make this assignment more interesting, more relevant or more challenging in future editions of this course.

(2 points) Proper typesetting of the report and overall presentation style. This includes the use of properly referenced figures, tables, and graphs (with descriptive axis titles and proper identification of units of measurement) where applicable.
(2 points) Meeting notes. See the collaboration requirements for what to include.
(1 point) Partner Evaluation Please complete the confidential partner evaluation for your partner. If you both complete the evaluation, you get a point.

This lab exercise was created by Taylor Lloyd for Dr. J Nelson Amaral, with inspiration from lab exercises created by Jean-Loup Baer and his team at the University of Washington. It was refactored by Rodolfo Wottrich in April/2016 based on student feedback and modified in 2024 to reflect the course change to the RISC-V ISA by Ayrton Chilibeck.